Static Random Access Memory (SRAM) is a well-known and commonly used functional block in digital systems and computers. In operation, data is written to an SRAM, where it is stored in the memory bit cells, and data is read from the memory bit cells and delivered as an output of the SRAM. SRAM is referred to as a volatile memory because once power is removed from the memory, the data stored therein is lost.
Advances in semiconductor manufacturing technologies have enabled the production of increasingly dense and fast SRAM components, or memory chips.
It is noted that “SRAM” is often used to refer to a chip, or integrated circuit, that is primarily a memory device. Those skilled in the art recognize that SRAM not only refers to a memory chip, but also refers to static memory circuitry that is embedded in, and forms a part of, a larger chip, which in turn may have a variety of other circuits and functions. These other circuits may be referred to as peripheral circuits.
Regardless of whether SRAMs are implemented as memory chips or as circuit blocks that are part of larger chips, the circuitry that makes up those memories is typically tested in order to ensure that the product is performing in accordance with its specification.
It is common to test memory circuits in several ways, including but not limited to writing patterns of logical ones and zeroes to the addressable locations of the memory array and reading them back. While such test procedures may verify the functional correctness of the memory circuits, these tests do not necessarily provide a measure of the robustness, or operational margins of the memory under test.
What is needed are methods and apparatus to facilitate evaluation of read and write margins in memory circuits.